CλaSH

From Haskell to Hardware

Example

FIR filter

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fir coeffs x = dotp coeffs (window x)
  where
    dotp as bs = sum (zipWith (*) as bs)

		Parametric in the number of filter taps

		Parametric in the data type

		Strongly-typed, yet free from type annotations

Why

Why use CλaSH

CλaSH (pronounced ‘clash’) is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. It provides a familiar structural design approach to both combinational and synchronous sequential circuits. The CλaSH compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog.

Features of CλaSH:

Strongly typed, but with a very high degree of type inference, enabling both safe and fast prototyping using concise descriptions.
Interactive REPL: load your designs in an interpreter and easily test all your component without needing to setup a test bench.
Compile your designs for fast simulation.
Higher-order functions, in combination with type inference, result in designs that are fully parametric by default.
Synchronous sequential circuit design based on streams of values, called Signals, lead to natural descriptions of feedback loops.
Multiple clock domains, with type safe clock domain crossing.
Template language for introducing new VHDL/(System)Verilog primitives.

setup details

How do I install CλaSH?

Please file a bug report if the following installation instructions do not work for you.

The CλaSH compiler is written in Haskell and is compiled from source using the GHC Haskell compiler version 8.2 or later:

Install GHC 8.4
- Download GHC for your platform. Unix users can use ./configure --prefix=<LOCATION> to set the installation location
- Make sure the bin directory of GHC is in your PATH
In case you cannot find what you are looking for on https://www.haskell.org/ghc/download_ghc_8_4_3, you can, alternatively, use the following instructions:
- Ubuntu:
  - sudo add-apt-repository -y ppa:hvr/ghc
  - sudo apt-get update
  - sudo apt-get install cabal-install-2.2 ghc-8.4.3 libtinfo-dev
  - update your PATH with: /opt/ghc/8.4.3/bin, /opt/cabal/2.2/bin and $HOME/.cabal/bin
  - Run `cabal update
  - Skip step 2.
- OS X:
  - Follow the instructions on: Haskell Platform Mac OS X to install the minimal Haskell platform.
  - Run cabal update
  - Skip step 2.
- Windows:
  - Follow the instructions on: Haskell Platform Windows to install the minimal Haskell platform
  - Run cabal update
  - Skip step 2.
Install Cabal (version 2.2)
- Binary, when available:
  - Download the binary for cabal-install
  - Put the binary in a location mentioned in your PATH
  - Add cabal’s bin directory to your PATH:
    - Windows: %appdata%\cabal\bin
    - Unix: $HOME/.cabal/bin
- Source:
  - Download the sources for cabal-install
  - Unpack (tar xf) the archive and cd to the directory
  - Run sh bootstrap.sh
  - Follow the instructions to add cabal to your PATH
- Run cabal update
Install CλaSH
- Run:
  - Linux: cabal install clash-ghc --enable-documentation --enable-executable-dynamic
  - Other: cabal install clash-ghc --enable-documentation
  - If you get the error can't load .so/.DLL for: libtinfo.so (libtinfo.so: cannot open shared object file: No such file or directory), add a symlink from libtinfo.5.so to libtinfo.so, and retry the cabal install process.
- This is going to take awhile, so have a refreshment xkcd

usage

Alright, you’ve got the compiler installed, now it’s time for some testing:

Download the FIR.hs example
Run clash --interactive FIR.hs
Execute, in the interpreter, the :vhdl command.
Execute, in the interpreter, the :verilog command.
Execute, in the interpreter, the :systemverilog command.
Exit the interpreter using :q
Examine the VHDL code in the vhdl directory
Examine the Verilog code in the verilog directory
Examine the SystemVerilog code in the systemverilog directory

documentation

Tutorial and Reference material

		Tutorial

		Reference documentation

		FAQ

		More examples

		Blog post: Programming an FPGA with CλaSH (not up to date for clash-0.99 or later)

		Blog post: Programming an FPGA with CλaSH - Xilinx version (not up to date for clash-0.99 or later)

Blog posts:

		Introduction to Clash for FPGA development

		Building a CPU with Haskell

		6502 in Clash

		An FPGA-based SKI calculus evaluator written in Haskell/Cλash

		Functional hardware

		Remote fpga call

		FIR filter design in Clash

community

		Mailing list

		Issue tracker

		freenode#clash-lang
		freenode#haskell-embedded

publications

Appel, R.N. and Folmer, H.H. (2016) Analysis, optimization, and design of a SLAM solution for an implementation on reconfigurable hardware (FPGA) using CλaSH. MSc thesis, University of Twente, Enschede, The Netherlands, December 2016.
Vossen, J.J. (2016) Offloading Haskell functions onto an FPGA. MSc thesis, University of Twente, Enschede, The Netherlands, December 2016.
Verheij, J.G.J. (2016) Co-simulation between CλaSH and traditional HDLs. MSc thesis, University of Twente, Enschede, The Netherlands, August 2016.
Raa, I. te (2015) Recursive functional hardware descriptions using CλaSH. MSc thesis, University of Twente, Enschede, The Netherlands, November 2015.
Wester, R. (2015) A transformation-based approach to hardware design using higher-order functions. PhD thesis, University of Twente, Enschede, The Netherlands, July 2015.
Bakker, M. (2015) Numerical mathematics on FPGAs using CλaSH. BSc thesis, University of Twente, Enschede, The Netherlands, July 2015.
Dam, M.R. (2015) Auditory processing using CλaSH. MSc thesis, University of Twente, Enschede, The Netherlands, May 2015.
Harmsen, R. (2015) Specifying the WaveCore in CλaSH. MSc thesis, University of Twente, Enschede, The Netherlands, March 2015.
Baaij, C.P.R. (2015) Digital Circuits in CλaSH: Functional Specifications and Type-Directed Synthesis. PhD thesis, University of Twente, Enschede, The Netherlands, January 2015.
Wester, R. and Kuper, J. (2014) Design space exploration of a particle filter using higher-order functions. In: Reconfigurable Computing: Architectures, Tools, and Applications. Lecture Notes in Computer Science 8405. Springer Verlag, London, pp. 219-226. ISSN 0302-9743 ISBN 978-3-319-05959-4.
Bos, J.C.H. (2014) Synthesizable Specification of a VLIW Processor in the Functional Hardware Description Language CλaSH. MSc thesis, University of Twente, Enschede, The Netherlands, September 2014.
Niedermeier, A. (2014) A Fine-Grained Parallel Dataflow-Inspired Architecture for Streaming Applications. PhD thesis, University of Twente, Enschede, The Netherlands, August 2014.
Kuper, J. and Wester, R. (2014) N Queens on an FPGA: Mathematics, Programming, or Both?. In: Communicating Processes Architectures 2014, 24-27 August 2014, Oxford, UK. Open Channel Publishing. ISBN 978-0-9565409-8-0.
Bronkhorst, T.A.W. (2014) Hardware design of a cooperative adaptive cruise control system using a functional programming language. MSc thesis, University of Twente, Enschede, The Netherlands, August 2014.
Jin, X. (2014) Implementation of the MUSIC Algorithm in CλaSH. MSc thesis, University of Twente, Enschede, The Netherlands, June 2014.
Nee, F. van (2014) To a new hardware design methodology: A case study of the cochlea model. MSc thesis, University of Twente, Enschede, The Netherlands, March 2014.
Baaij, C.P.R. and Kuper, J. (2014) Using Rewriting to Synthesize Functional Languages to Digital Circuits. In: Jay McCarthy, editor, Trends in Functional Programming (TFP), Provo, UT, USA, May 14-16, 2013. Volume 8322 of Lecture Notes in Computer Science (LNCS). pages 17–33. Springer-Verlag. ISBN 978-3-642-45340-3.
Wester, R. and Baaij, C.P.R. and Kuper, J. (2012) A two step hardware design method using CλaSH. In: Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), Aug 29-31, 2012, Oslo, Norway. pages 181-188. IEEE Computer Society. ISBN 978-1-4673-2257-7.
Wester, R. and Sarakiotis, D. and Kooistra, E. and J. Kuper. (2012) Specifications of APERTIF Polyphase Filter Bank in CλaSH. In: Communicating Process Architectures (CPA), pages 53-64, United Kingdom, August 2012. Open Channel Publishing. ISBN 978-0-9565409-5-9.
Gerards, M.E.T. and Baaij, C.P.R. and Kuper, J. and Kooijman, M. (2011) Higher-Order Abstraction in Hardware Descriptions with CλaSH. In: Proceedings of the 14th Conference on Digital System Design (DSD), Oulu, Finland. pages 495-502, 31 Aug - 2 September, 2011. IEEE Computer Society. ISBN 978-0-7695-4494-6.
Niedermeier, A. and Wester, R. and Rovers, K.C. and Baaij, C.P.R. and Kuper, J. and Smit, G.J.M. (2010) Designing a dataflow processor using CλaSH. In: 28th Norchip Conference, 15-16 November 2010, Tampere, Finland. 69. IEEE Circuits and Systems Society. ISBN 978-1-4244-8971-8.
Kuper, J. and Baaij, C.P.R. and Kooijman, M. and Gerards, M.E.T. (2010) Exercises in architecture specification using CλaSH. In: Proceedings of Forum on Specification and Design Languages (FDL), 2010, Southampton, England, Sept 13-16. pages 178-183. Electronic Chips & Systems design Initiative (ECSI). ISSN 1636-9874.
Baaij, C.P.R. and Kooijman, M. and Kuper, J. and Boeijink, W.A. and Gerards, M.E.T. (2010) CλaSH: Structural Descriptions of Synchronous Hardware using Haskell. In: Proceedings of the 13th Conference on Digital System Design (DSD), Lille, France, Sept 1-3, 2010. pages 714-721. IEEE Computer Society. ISBN 978-0-7695-4171-6.
Smit, G.J.M. and Kuper, J. and Baaij, C.P.R (2010) A mathematical approach towards hardware design. In: Dagstuhl Seminar on Dynamically Reconfigurable Architectures, 11-16 July 2010, Dagstuhl, Germany.
Baaij, C.P.R. (2009) CλasH : from Haskell to hardware. MSc thesis, University of Twente, Enschede, The Netherlands, December 2009.
Kooijman, M. (2009) Haskell as a higher order structural hardware description language. MSc thesis, University of Twente, Enschede, The Netherlands, December 2009.

CλaSH is open source — Issue tracker — Mailing list